KyuPy - Pythonic Processing of VLSI Circuits
KyuPy is a Python package for processing and analysis of non-hierarchical gate-level VLSI designs. It contains fundamental building blocks for research software in the fields of VLSI test, diagnosis and reliability:
Efficient data structures for gate-level circuits and related design data.
Partial lark parsers for common design files like bench, gate-level Verilog, standard delay format (SDF), standard test interface language (STIL), design exchange format (DEF).
Bit-parallel gate-level 2-, 4-, and 8-valued logic simulation.
GPU-accelerated high-throughput gate-level timing simulation.
Getting Started
KyuPy is available in PyPI. It requires Python 3.8 or newer, lark-parser, and numpy. Although optional, numba should be installed for best performance. GPU/CUDA support in numba may require some additional setup. If numba is not available, KyuPy will automatically fall back to slow, pure Python execution.
The Jupyter Notebook Introduction.ipynb contains some useful examples to get familiar with the API.
Development
To work with the latest pre-release source code, clone the KyuPy GitHub repository.
Run pip install -e . within your local checkout to make the package available in your Python environment.
The source code comes with tests that can be run with pytest.