Parsers

KyuPy contains simple (and often incomplete) parsers for common file formats. These parsers are tailored to the most common use-cases to keep the grammars and the code-base as simple as possible.

Each of the modules export a function parse() for parsing a string directly and a function load() for loading a file. Files with a ‘.gz’ extension are uncompressed on-the-fly.

Verilog - kyupy.verilog

A simple and incomplete parser for Verilog files.

The main purpose of this parser is to load synthesized, non-hierarchical (flat) gate-level netlists. It supports only a subset of Verilog.

kyupy.verilog.parse(text, tlib=<kyupy.techlib.TechLib object>, branchforks=False) → Circuit

Parses the given text as Verilog code.

Parameters:

  • text – A string with Verilog code.

  • tlib (TechLib) – A technology library object that defines all known cells.

  • branchforks – If set to True, the returned circuit will include additional forks on each fanout branch. These forks are needed to correctly annotate interconnect delays (see interconnects()).

Returns:

A Circuit object.

kyupy.verilog.load(file, tlib=<kyupy.techlib.TechLib object>, branchforks=False)

Parses the contents of file as Verilog code.

Parameters:

  • file – A file name or a file handle. Files with .gz-suffix are decompressed on-the-fly.

  • tlib (TechLib) – A technology library object that defines all known cells.

  • branchforks – If set to True, the returned circuit will include additional forks on each fanout branch. These forks are needed to correctly annotate interconnect delays (see interconnects()).

Returns:

A Circuit object.

Bench Format - kyupy.bench

A parser for the ISCAS89 benchmark format.

The ISCAS89 benchmark format (.bench-suffix) is a very simple textual description of gate-level netlists. Historically it was first used in the ISCAS89 benchmark set. Besides loading these benchmarks, this module is also useful for easily constructing simple circuits: c = bench.parse('input(x, y) output(a, o, n) a=and(x,y) o=or(x,y) n=not(x)').

kyupy.bench.parse(text, name=None) → Circuit

Parses the given text as ISCAS89 bench code.

Parameters:

  • text – A string with bench code.

  • name – The name of the circuit. Circuit names are not included in bench descriptions.

Returns:

A Circuit object.

kyupy.bench.load(file, name=None)

Parses the contents of file as ISCAS89 bench code.

Parameters:

  • file – The file to be loaded. Files with .gz-suffix are decompressed on-the-fly.

  • name – The name of the circuit. If None, the file name is used as circuit name.

Returns:

A Circuit object.

Standard Test Interface Language - kyupy.stil

A simple and incomplete parser for the Standard Test Interface Language (STIL).

The main purpose of this parser is to load scan pattern sets from STIL files. It supports only a subset of STIL.

The functions parse() and load() return an intermediate representation (StilFile object). Call StilFile.tests(), StilFile.tests_loc(), or StilFile.responses() to obtain the appropriate vector sets.

kyupy.stil.parse(text)

Parses the given text and returns a StilFile object.

kyupy.stil.load(file)

Parses the contents of file and returns a StilFile object.

Files with .gz-suffix are decompressed on-the-fly.

class kyupy.stil.StilFile(version, signal_groups, scan_chains, calls)

An intermediate representation of a STIL file.

tests(circuit)

Assembles and returns a scan test pattern set for given circuit.

This function assumes a static (stuck-at fault) test.

Parameters:

circuit – The circuit to assemble the patterns for. The patterns will follow the s_nodes ordering of the this circuit.

Returns:

A 4-valued multi-valued (mv) logic array (see logic). The values for primary inputs and sequential elements are filled, the primary outputs are left unassigned.

tests_loc(circuit, init_filter=None, launch_filter=None)

Assembles and returns a LoC scan test pattern set for given circuit.

This function assumes a launch-on-capture (LoC) delay test. It performs a logic simulation to obtain the first capture pattern (the one that launches the delay test) and assembles the test pattern set from from pairs for initialization- and launch-patterns.

Parameters:

  • circuit – The circuit to assemble the patterns for. The patterns will follow the s_nodes ordering of the this circuit.

  • init_filter – A function for filtering the initialization patterns. This function is called with the initialization patterns from the STIL file as mvarray before logic simulation. It shall return an mvarray with the same shape. This function can be used, for example, to fill patterns.

  • launch_filter – A function for filtering the launch patterns. This function is called with the launch patterns generated by logic simulation before they are combined with the initialization patterns to form the final 8-valued test patterns. The function shall return an mvarray with the same shape. This function can be used, for example, to fill patterns.

Returns:

An 8-valued multi-valued (mv) logic array (see logic). The values for primary inputs and sequential elements are filled, the primary outputs are left unassigned.

responses(circuit)

Assembles and returns a scan test response pattern set for given circuit.

Parameters:

circuit – The circuit to assemble the patterns for. The patterns will follow the s_nodes ordering of the this circuit.

Returns:

A 4-valued multi-valued (mv) logic array (see logic). The values for primary outputs and sequential elements are filled, the primary inputs are left unassigned.

Standard Delay Format - kyupy.sdf

A simple and incomplete parser for the Standard Delay Format (SDF).

This parser extracts pin-to-pin delay and interconnect delay information from SDF files. Sophisticated timing specifications (timing checks, conditional delays, etc.) are ignored.

The functions parse() and load() return an intermediate representation (DelayFile object). Call DelayFile.iopaths() and DelayFile.interconnects() to generate delay information for a given circuit.

kyupy.sdf.parse(text)

Parses the given text and returns a DelayFile object.

kyupy.sdf.load(file)

Parses the contents of file and returns a DelayFile object.

Files with .gz-suffix are decompressed on-the-fly.

class kyupy.sdf.DelayFile(name, cells)

An intermediate representation of an SDF file.

iopaths(circuit: Circuit, tlib: TechLib)

Constructs an ndarray containing all IOPATH delays.

All IOPATH delays for a node n are annotated to the line connected to the input pin specified in the IOPATH.

Limited support of SDF spec:

  • Only ABSOLUTE delay values are supported.

  • Only two delvals per delval_list is supported. First is rising/posedge, second is falling/negedge transition at the output of the IOPATH (SDF spec, pp. 3-17).

  • PATHPULSE declarations are ignored.

The axes convention of KyuPy’s delay data arrays is as follows:

  • Axis 0: dataset (usually 3 datasets per SDF-file)

  • Axis 1: line index (e.g. n.ins[0], n.ins[1])

  • Axis 2: polarity of the transition at the IOPATH-input (e.g. at n.ins[0] or n.ins[1]), 0=’rising/posedge’, 1=’falling/negedge’

  • Axis 3: polarity of the transition at the IOPATH-output (at n.outs[0]), 0=’rising/posedge’, 1=’falling/negedge’

interconnects(circuit: Circuit, tlib: TechLib)

Constructs an ndarray containing all INTERCONNECT delays.

To properly annotate interconnect delays, the circuit model has to include a ‘__fork__’ node on every signal and every fanout-branch. The Verilog parser aids in this by setting the parameter branchforks=True in parse() or load().

Limited support of SDF spec:

  • Only ABSOLUTE delay values are supported.

  • Only two delvals per delval_list is supported. First is rising/posedge, second is falling/negedge transition.

  • PATHPULSE declarations are ignored.

The axes convention of KyuPy’s delay data arrays is as follows:

  • Axis 0: dataset (usually 3 datasets per SDF-file)

  • Axis 1: line index. Usually input line of a __fork__.

  • Axis 2: (axis of size 2 for compatability to IOPATH results. Values are broadcast along this axis.)

  • Axis 3: polarity of the transition, 0=’rising/posedge’, 1=’falling/negedge’

Design Exchange Format - kyupy.def_file

A simple and incomplete parser for the Design Exchange Format (DEF).

This parser extracts information on components and nets from DEF files and make them available as an intermediate representation (DefFile object).

kyupy.def_file.parse(text)

Parses the given text and returns a DefFile object.

kyupy.def_file.load(file)

Parses the contents of file and returns a DefFile object.

Files with .gz-suffix are decompressed on-the-fly.

class kyupy.def_file.DefFile

Intermediate representation of a DEF file.